Prasanth Varasala, Babulu Karapa, Kamaraju Maddu. Intelligent Clock Gating for FPGA-based RISC Architectures: A Novel Approach to Switching Activity and Dynamic Power Reduction. IJC [Internet]. 2024 Jul. 10 [cited 2026 Mar. 12];51(1):79-8. Available from: https://ijcjournal.org/InternationalJournalOfComputer/article/view/2238